The demand for miniaturization, multifunctional and connected devices including smartphones, wearables, and Internet of Things has been growing very fast. This miniaturization and functionality leads to the increased demand for high density and high bandwidth interconnections. The concept of 2.5-D and 3-D IC integration for packaging is a key component to achieve next-generation performance requirements and to apply to commercial products. The ultrahigh number of I/O connections is becoming available using interposers.
Interposers are substrates used as an electrical interface routing between one connection and another. The purpose of an interposer is to spread a connection to a wider pitch or to reroute a connection to another connection with a different pitch. Interposers represent substrates in different formats with a large number of holes (vias) in it. It is expected that 2.5 D interposers have high interconnect density at short interconnect length, low power consumption and low packaging costs. Need for high interconnect density creates demand for high density vias.
Interposers are used to develop the heterogeneous integration of multiple ICs on a single platform/package. Interposers also allow dense ICs on a package or board especially when it comes to extremely small I/O pitch and line spacing. High-performance applications require these current interposer technologies to have high I/Os at an extremely fine pitch, high dimensional stability, extremely low warpage, high temperature stability, and low CTE mismatch.
One of the most prominent and widely used type of interposers are through silicon vias – TSV interposers. Besides silicon and organic materials, glass is considered a suitable material to manufacture interposers for high-performance applications. Glass as material and glass interposers manufactured out of it enable excellent dimensional stability, closely matched and tailorable coefficient of thermal expansion (CTE) to the silicon die, high thermal stability , and high electrical resistivity.
The composition of glass can changed allowing tailoring of glass properties to specific applications. Glass in comparison to silicon has many properties that make it an ideal substrate for RF components such as: ultra-high resistivity and low electrical loss. These properties have made glass as an interesting candidate for emerging substrate technologies for interposers.
Additionally glass can be manufactured in the form of a wafer as well as in panel formats. Various thicknesses including ultrathin variants are possible. The fusion forming process gives the ability to form high quality substrates in large formats (>1 m in size). In addition to scaling glass substrate size, it is possible to deliver ultra-slim flexible glass to thicknesses down to ~100 µm. Providing large substrates in wafer or panel format at 100 µm thickness gives significant opportunities to reduce manufacturing costs of glass interposers.
One of the established areas of the application of glass interposers is RF packaging. It is based on the special properties of glass such as low electrical loss particularly at high frequencies. The relatively high stiffness and ability to adjust the coefficient of thermal expansion gives advantages to manage warp in the glass core substrates and bonded stacks.
Wafer-level packaging is a key technology to guarantee the MEMS devices’ lifetime and reliability. TSV technology is quite frequently used for MEMS packaging. In cases where glass is used for manufacturing of sensors as a capping wafer, through glass vias can be utilized providing a vertical connection through a glass substrate. A new type of packaging substrates is being developed utilizing an entire glass panel or a part of it. These types of packaging substrates find its application in photonics packaging, high performance computing and others areas.
Glass, when used as a substrate for die embedding, provides many benefits, not found in existing Wafer Level Fan Out (WLFO) packaging technologies. The smooth surface and high-dimensional stability of glass enables silicon-like redistribution layer( RDL) wiring and BEOL-like I/Os even on large panels, with an unparalleled combination of ultra- high I/Os and lower cost. The CTE of glass can be tailored thus enabling the direct attachment to board. Glass also provides high resistivity, excellent moisture resistance, and high surface smoothness, compared to mold compounds.
Glass interposers represent glass substrates with a large number of holes in it which provide vertical electrical connection through a glass substrate. They are called Through Glass Via (TGV) substrates. Vias manufactured in a glass substrate can be blind or through vias. Vias can be manufactured in different diameters and shapes. There are also other important parameters such as aspect ratio of via and taper angle. Aspect ratio is a relation of diameter of the via to the depth of the via. Taper angle is the angle defining opening of the via.
The formation of through hole vias is essential for an interposer. TGV substrates are manufactured with a combined laser and etching technology. The laser introduces a modification in glass, weakening the glass structure in predefined areas. This allows increased etching rates in these modified areas in comparison to surrounding material. This process is called laser induced etching. The process does not create any cracks in the glass and allows to create blind and through vias in glass. Advanced laser processing and etching techniques enable the creation of very high aspect ratios. Typical via diameters are 20 - 100 micrometers and typical aspect rations from 1:4 - 1:10.
Increasing demands for bandwidth in high performance computing, Fifth-generation (5G) communication, and Internet of Things (IOT) applications have driven the migration to 2.5D and 3D interposers, requiring less high frequency loss and higher ratio of hole depth/dimension for vertical interconnections making the need for TGVs with high aspect ratios. There is also demand for large number of closely positioned vias – high density vias. To obtain high density of vias on the same area requires that each via takes minimal space. This requirement leads to demand for smaller taper angles and vias with large opening characterized by larger taper angles become unfavorable.
To obtain holes with high aspect ratios, highly selective etching processes are needed. Depending on the choice of glass, in some cases etching with acids is sufficient. But in many cases, the results of acidic etching do not meet the requirements, as the etching is very fast. This leads to processes with low selectivity, not allowing to achieve high aspect ratios and leading to higher taper angles.
RENA offers an optimized highly selective etching process based on alkaline media. The RENA etching process allows to maintain a very high selectivity and to keep process times short. Highly selective RENA etching processes enables:
- Very lower taper angles down to 1 degree
- Very short process times
- High aspect ratio vias
RENA offers etching solutions for wafer & panel formats. TGV can be manufactured on 6 inch wafers to 12 inch wafers as well as panel formats 510 x 515 mm, 457 x 610 mm, 600 x 600 mm.